Mesa 12.0 RC4 Has Been Released, Final Is Near

Mesa 12.0 RC4 has been released recently. According to Emil Velikov, the fourth release candidate will be the last one and Mesa 12 final will be released in the next couple of days.

Update: Mesa 12.0 will be released tomorrow, 08:00 PM (GMT).

Update 2: They're late ...

Here are the last fixes (since RC3):

Emil Velikov (1):
Update version to 12.0.0-rc4

Iago Toral Quiroga (1):
i965/fs: Fix single-precision to double-precision conversions for CHV/BSW/BXT

Ian Romanick (2):
glsl: Always strip arrayness in precision_qualifier_allowed
mesa: If validation fails in a debug context just emit a debug message

Ilia Mirkin (2):
gk104/ir: fix tex use generation to be more careful about eliding uses
nvc0: don't make use of push hint if there are no non-const user vbos

Jason Ekstrand:
nir/algebraic: Remove imprecise flog2 optimizations
nir: Add a pass for propagating invariant decorations
nir/alu_to_scalar: Respect the exact ALU operation qualifier
anv/pipeline: Do invariance propagation on SPIR-V shaders
anv/cmd_buffer: Don't crash if push constants are provided for missing stages
anv/cmd_buffer: Set depth/stencil extent based on the image
anv/cmd_buffer: Split emit_viewport in two
anv: Add proper support for depth clamping

Kenneth Graunke (6):
mesa: Pass gl_constant_value union into _mesa_fetch_state().
glsl: Optionally lower TES gl_PatchVerticesIn to a uniform.
i965: Use a uniform for gl_PatchVerticesIn in the TES.
glsl: Optionally lower TCS gl_PatchVerticesIn to a uniform.
i965: Use a uniform for gl_PatchVerticesIn in the TCS on Gen8+.
i965: Fix multiplication of immediates on Cherryview/Broxton.

Nicolai Hähnle (6):
mesa/main: fix integer overflows in _mesa_image_offset
radeonsi: raise SI_PM4_MAX_DW
radeonsi: fix calculation of valid RB mask per SE
st/mesa: flush bitmap cache before compute dispatch
st/mesa: flush bitmap cache before texture functions
st/mesa: flush bitmap cache before CopyImageSubData

Roland Scheidegger (1):
gallivm: don't use integer min/max sse intrinsics with llvm >= 3.9

Samuel Iglesias Gonsálvez (1):
i965/fs: indirect addressing with doubles is not supported in CHV/BSW/BXT

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